CPU+GPU架构下节点阻抗矩阵生成及节点编号优化方法

邱智勇; 周越德; 刘中平

doi:10.7500/AEPS20190525002

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CPU+GPU架构下节点阻抗矩阵生成及节点编号优化方法

研制与开发 | 更新时间：2025-06-16

- CPU+GPU架构下节点阻抗矩阵生成及节点编号优化方法
- Optimal Methods of Node Impedance Matrix Construction and Node Numbering Based on CPU and GPU Collaborative Architecture
- 电力系统自动化-方正平台 2020年44卷第2期页码：214-220
- 作者机构：
  
  1.国家电网有限公司华东分部，上海市 200120
  2.北京中恒博瑞数字电力科技有限公司，北京市 100085
- 作者简介：
  
  邱智勇(1977—)，男，通信作者，硕士，高级工程师，主要研究方向:电力系统及其自动化。E-mail：qiu_zy@ ec.sgcc.com.cn
  周越德(1985—)，男，硕士，主要研究方向:电力系统及其自动化。E-mail：zhouyd@hzzh.com
  刘中平(1979—),男,硕士，高级工程师，主要研究方向:电力系统及其自动化。E-mail：liu_zp@ec.sgcc.com.cn
- 基金信息：
- DOI：10.7500/AEPS20190525002
  中图分类号：
- 收稿日期：2019-05-25，
  
  修回日期：2019-07-11，
  
  网络出版日期：2019-11-13，
  
  纸质出版日期：2020-01-25
- 稿件说明：
移动端阅览
邱智勇,周越德,刘中平.CPU+GPU架构下节点阻抗矩阵生成及节点编号优化方法[J].电力系统自动化,2020,44(02):214-220.

QIU Zhiyong,ZHOU Yuede,LIU Zhongping.Optimal Methods of Node Impedance Matrix Construction and Node Numbering Based on CPU and GPU Collaborative Architecture[J].Automation of Electric Power Systems,2020,44(02):214-220.
邱智勇,周越德,刘中平.CPU+GPU架构下节点阻抗矩阵生成及节点编号优化方法[J].电力系统自动化,2020,44(02):214-220. DOI： 10.7500/AEPS20190525002.

QIU Zhiyong,ZHOU Yuede,LIU Zhongping.Optimal Methods of Node Impedance Matrix Construction and Node Numbering Based on CPU and GPU Collaborative Architecture[J].Automation of Electric Power Systems,2020,44(02):214-220. DOI： 10.7500/AEPS20190525002.

摘要

随着电网规模不断扩大，快速形成大电网节点阻抗矩阵具有重要实用价值。为了加速阻抗矩阵的生成，针对中央处理器（CPU）+图形处理器（GPU）协同计算架构设计了基于GPU的并行支路追加法。通过分析电网拓扑结构与链支的关系，基于图论最小环设计了节点编号优化算法；通过厂站连接关系，提取厂站级别最小环，利用拓扑排序，确定群追加顺序。在群基础上确定厂站追加顺序

进而进行节点编号顺序优化。试验结果表明，相比串行计算方法，所提方法在计算效率方面有显著提高，在大电网计算中，可获得数十倍的加速比，追加链支的加速比达百倍。

Abstract

With the continuous expansion of power grid

it is of great practical value to rapidly form the node impedance matrix of large-scale power grid. In order to accelerate the generation of impedance matrix

a graphic processing unit （GPU）-based parallel branch addition method is designed based on collaborative central processing unit （CPU） and GPU computation architecture. In addition

by analyzing the relationship between the topology structure of power grid and the chain branch

an optimized algorithm of node numbering is designed based on the minimum loop of the graph theory. The minimum loop of the substation level is extracted from the connections of plants/substations

and the topological sort is used to determine the order of group additions. The order of substation additions is determined based on the group

and then node numbering order is optimized. The experimental results show that

comparing with the serial computing method

the proposed method has a significant improvement in computation efficiency. In the calculation of large power grid

the speedup ratio could get tens of times

and the speedup ratio of additional chain branches could reach hundreds of times.

关键词

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