A simplified three-level space vector pulse width modulation（SVPWM）algorithm for a three-level diode neutral point clamped（NPC）traction inverter in a motor system is discussed first based on the close relationship between the geometrical symmetry of sectors and the duty-ratio time of vectors.Then，a detailed design scheme based on the field programming gate array（FPGA）characterized by high speed，good compatibility and reusability is presented，which can relieve the digital processing unit of heavy trigonometric function computation through the simplified design of multiplier and divider units.Finally，the accuracy of the simplified three-level SVPWM algorithm and the feasibility of the design scheme based on FPGA are verified in the hardware-in-the-loop（HIL）experimental platform based on FPGA and dSPACE.