Detection of phase and frequency by synchronous reference frame phase-locked loop(SRF-PLL)and its improved versions are closely coupled. If the voltage with an unvaried frequency has a step change in phase angle

the detected frequency will suffer a transient process

causing errors to the detection of frequency. Thus

based on the structure of quasi-type-1 phase-locked loop(QT1-PLL)

a modified quasi-type-1 phase-locked loop(MT1-PLL)is proposed with a decoupled unit

which is able to achieve decoupled detection of phase and frequency. In order to improve the ability of MT1-PLL to reject unbalance

harmonics

etc.

cascaded delayed signal cancellation(CDSC)is combined with a proposed mathematical filter

forming a pre-loop filtering module to extract fundamental positive sequence voltage. The module features the elimination of 2nd harmonics

and a fast filter process takes only 0. 635 cycles. Meanwhile

the phase errors in the module caused by deviations of grid frequency

and sampling frequency are also considered

which are compensated by an error feedforward method. Finally

simulations are conducted in PSCAD/EMTDC under various operation conditions to verify the effectiveness of MT1-PLL

filtering module and cancellation method of phase error.